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CR bits are now resident in registers instead of being baked into the instruction definitions. Same for XER SO, and LWARX reservation EA and value. Reworked LWARX/STWCX, CRxx ops, compare and branch instructions. As well as RC bit handling. Not all CR-related instructions are reimplemented yet. Introduced atomic_cmp_store operation to allow implementing STWCX in architecture agnostic IML Removed legacy CR-based compare and jump operations |
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| .. | ||
| asm | ||
| audio | ||
| Cafe | ||
| Cemu | ||
| Common | ||
| config | ||
| gui | ||
| imgui | ||
| input | ||
| resource | ||
| tools | ||
| util | ||
| CMakeLists.txt | ||
| main.cpp | ||
| mainLLE.cpp | ||