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Merge 780307544f into ed2fe134aa

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Craig 2025-12-15 17:14:34 -06:00 committed by GitHub
commit 96848ab908
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2 changed files with 7 additions and 7 deletions
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12
Source/Core/Core/PowerPC/MMU.cpp
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@ -175,7 +175,7 @@ T MMU::ReadFromHardware(u32 em_address)
(IsOpcodeFlag(flag) ? m_ppc_state.msr.IR.Value() : m_ppc_state.msr.DR.Value())) (IsOpcodeFlag(flag) ? m_ppc_state.msr.IR.Value() : m_ppc_state.msr.DR.Value()))
{ {
auto translated_addr = TranslateAddress<flag>(em_address); auto translated_addr = TranslateAddress<flag>(em_address);
if (!translated_addr.Success()) if (!translated_addr.Succeeded())
{ {
if (flag == XCheckTLBFlag::Read) if (flag == XCheckTLBFlag::Read)
GenerateDSIException(em_address, false); GenerateDSIException(em_address, false);
@ -293,7 +293,7 @@ void MMU::WriteToHardware(u32 em_address, const u32 data, const u32 size)
if (!never_translate && m_ppc_state.msr.DR) if (!never_translate && m_ppc_state.msr.DR)
{ {
auto translated_addr = TranslateAddress<flag>(em_address); auto translated_addr = TranslateAddress<flag>(em_address);
if (!translated_addr.Success()) if (!translated_addr.Succeeded())
{ {
if (flag == XCheckTLBFlag::Write) if (flag == XCheckTLBFlag::Write)
GenerateDSIException(em_address, true); GenerateDSIException(em_address, true);
@ -478,7 +478,7 @@ TryReadInstResult MMU::TryReadInstruction(u32 address)
if (m_ppc_state.msr.IR) if (m_ppc_state.msr.IR)
{ {
auto tlb_addr = TranslateAddress<XCheckTLBFlag::Opcode>(address); auto tlb_addr = TranslateAddress<XCheckTLBFlag::Opcode>(address);
if (!tlb_addr.Success()) if (!tlb_addr.Succeeded())
{ {
return TryReadInstResult{false, false, 0, 0}; return TryReadInstResult{false, false, 0, 0};
} }
@ -845,7 +845,7 @@ template <XCheckTLBFlag flag>
bool MMU::IsEffectiveRAMAddress(const u32 address) bool MMU::IsEffectiveRAMAddress(const u32 address)
{ {
const auto translate_address = TranslateAddress<flag>(address); const auto translate_address = TranslateAddress<flag>(address);
return translate_address.Success() && IsPhysicalRAMAddress(translate_address.address); return translate_address.Succeeded() && IsPhysicalRAMAddress(translate_address.address);
} }
bool MMU::HostIsRAMAddress(const Core::CPUThreadGuard& guard, u32 address, bool MMU::HostIsRAMAddress(const Core::CPUThreadGuard& guard, u32 address,
@ -1143,7 +1143,7 @@ TranslateResult MMU::JitCache_TranslateAddress(u32 address)
// TODO: We shouldn't use FLAG_OPCODE if the caller is the debugger. // TODO: We shouldn't use FLAG_OPCODE if the caller is the debugger.
const auto tlb_addr = TranslateAddress<XCheckTLBFlag::Opcode>(address); const auto tlb_addr = TranslateAddress<XCheckTLBFlag::Opcode>(address);
if (!tlb_addr.Success()) if (!tlb_addr.Succeeded())
return TranslateResult{}; return TranslateResult{};
const bool from_bat = tlb_addr.result == TranslateAddressResultEnum::BAT_TRANSLATED; const bool from_bat = tlb_addr.result == TranslateAddressResultEnum::BAT_TRANSLATED;
@ -1574,7 +1574,7 @@ MMU::TranslateAddressResult MMU::TranslateAddress(u32 address)
std::optional<u32> MMU::GetTranslatedAddress(u32 address) std::optional<u32> MMU::GetTranslatedAddress(u32 address)
{ {
auto result = TranslateAddress<XCheckTLBFlag::NoException>(address); auto result = TranslateAddress<XCheckTLBFlag::NoException>(address);
if (!result.Success()) if (!result.Succeeded())
{ {
return std::nullopt; return std::nullopt;
} }

2
Source/Core/Core/PowerPC/MMU.h
View File

@ -274,7 +274,7 @@ private:
: address(address_), result(result_), wi(wi_) : address(address_), result(result_), wi(wi_)
{ {
} }
bool Success() const { return result <= TranslateAddressResultEnum::PAGE_TABLE_TRANSLATED; } bool Succeeded() const { return result <= TranslateAddressResultEnum::PAGE_TABLE_TRANSLATED; }
}; };
union EffectiveAddress union EffectiveAddress