diff --git a/Source/Core/Core/PowerPC/JitArm64/Jit.h b/Source/Core/Core/PowerPC/JitArm64/Jit.h
index 77ba6d0bb35..2d14d634dfa 100644
--- a/Source/Core/Core/PowerPC/JitArm64/Jit.h
+++ b/Source/Core/Core/PowerPC/JitArm64/Jit.h
@@ -376,6 +376,7 @@ protected:
 
   void ComputeRC0(Arm64Gen::ARM64Reg reg);
   void ComputeRC0(u32 imm);
+  void GenerateConstantOverflow(bool overflow);
   void ComputeCarry(Arm64Gen::ARM64Reg reg);  // reg must contain 0 or 1
   void ComputeCarry(bool carry);
   void ComputeCarry();
diff --git a/Source/Core/Core/PowerPC/JitArm64/JitArm64_Integer.cpp b/Source/Core/Core/PowerPC/JitArm64/JitArm64_Integer.cpp
index 087a4cd9077..fc12676043b 100644
--- a/Source/Core/Core/PowerPC/JitArm64/JitArm64_Integer.cpp
+++ b/Source/Core/Core/PowerPC/JitArm64/JitArm64_Integer.cpp
@@ -39,6 +39,25 @@ void JitArm64::ComputeRC0(u32 imm)
   MOVI2R(gpr.CR(0), s64(s32(imm)));
 }
 
+void JitArm64::GenerateConstantOverflow(bool overflow)
+{
+  ARM64Reg WA = gpr.GetReg();
+
+  if (overflow)
+  {
+    MOVI2R(WA, XER_OV_MASK | XER_SO_MASK);
+    STRB(IndexType::Unsigned, WA, PPC_REG, PPCSTATE_OFF(xer_so_ov));
+  }
+  else
+  {
+    LDRB(IndexType::Unsigned, WA, PPC_REG, PPCSTATE_OFF(xer_so_ov));
+    AND(WA, WA, LogicalImm(~XER_OV_MASK, GPRSize::B32));
+    STRB(IndexType::Unsigned, WA, PPC_REG, PPCSTATE_OFF(xer_so_ov));
+  }
+
+  gpr.Unlock(WA);
+}
+
 void JitArm64::ComputeCarry(ARM64Reg reg)
 {
   js.carryFlag = CarryFlag::InPPCState;