JosJuice 67791d227c JitArm64: Add special zero case to ADDI2R ... This normally doesn't reduce the instruction count, but is nonetheless useful on CPUs that can do 0-cycle moves.		2023-12-01 21:31:11 +01:00
..
Android	Merge pull request #12298 from Shoegzer/master	2023-11-28 22:45:17 +01:00
Core	JitArm64: Add special zero case to ADDI2R	2023-12-01 21:31:11 +01:00
DSPSpy
DSPTool
PCH	bump minimum VS version to 17.6	2023-05-16 20:21:36 -07:00
UnitTests	JitArm64: Use LSL+CLS for classifying floats	2023-11-28 18:30:45 +01:00
VSProps	Remove redundant 32-bit code	2023-11-28 23:03:26 +11:00
.clang-format
CMakeLists.txt
dolphin-emu.sln	Add lz4 submodule	2023-10-02 17:28:23 -04:00