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Using LDP/STP when accessing m_ppc_state lets us load/store two registers at once. We previously opportunistically used STP, but this new analysis lets us move loads earlier and move stores later to make use of LDP/STP in more situations. This reduces code size and time spent on m_ppc_state accesses, possibly with exceptions when under heavy register pressure. This commit adds the new bitsets load_pairs and store_pairs to BlockRegStats, which indicate which registers should be treated as a pair when loading and storing to m_ppc_state. The commits after this one will add code that reads these bitsets to determine when to use LDP/STP. x64 doesn't have instructions that can load/store a pair of registers, so the new PPCAnalyst code is ifdef'd for AArch64.
58 lines
1.5 KiB
C++
58 lines
1.5 KiB
C++
// Copyright 2021 Dolphin Emulator Project
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// SPDX-License-Identifier: GPL-2.0-or-later
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#include <gtest/gtest.h>
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#include "Common/BitSet.h"
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#include "Core/PowerPC/PPCAnalyst.h"
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TEST(PPCAnalyst, FindRegisterPairs)
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{
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BitSet32 input{1, 3, 4, 6, 7, 8, 11, 12, 13, 14, 19, 20, 21, 22, 23};
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BitSet32 output{15, 18, 30};
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BitSet32 input_expected{1, 6, 7, 8, 19, 20, 21, 22, 23};
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BitSet32 output_expected{3, 11, 13, 15, 18, 30};
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PPCAnalyst::FindRegisterPairs(&input, &output);
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ASSERT_EQ(input, input_expected);
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ASSERT_EQ(output, output_expected);
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}
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TEST(PPCAnalyst, FindRegisterPairs_AllOnes)
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{
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BitSet32 input(0xFFFFFFFF);
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BitSet32 output(0x0);
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BitSet32 input_expected(0x0);
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BitSet32 output_expected(0x55555555);
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PPCAnalyst::FindRegisterPairs(&input, &output);
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ASSERT_EQ(input, input_expected);
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ASSERT_EQ(output, output_expected);
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}
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TEST(PPCAnalyst, FindRegisterPairs_Masked)
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{
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BitSet32 input{1, 3, 4, 6, 7, 8, 11, 12, 13, 14, 19, 20, 21, 22, 23};
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BitSet32 output{15, 18, 30};
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BitSet32 mask{1, 8, 9, 21, 22};
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BitSet32 input_expected{1, 3, 4, 6, 7, 8, 11, 12, 13, 14, 19, 20, 23};
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BitSet32 output_expected{15, 18, 21, 30};
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PPCAnalyst::FindRegisterPairs(&input, &output, mask);
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ASSERT_EQ(input, input_expected);
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ASSERT_EQ(output, output_expected);
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}
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TEST(PPCAnalyst, OddLengthRunsToEvenLengthRuns)
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{
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BitSet32 input{1, 3, 4, 6, 7, 8, 11, 12, 13, 14, 19, 20, 21, 22, 23};
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BitSet32 expected{3, 6, 7, 11, 12, 13, 19, 20, 21, 22};
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PPCAnalyst::OddLengthRunsToEvenLengthRuns(&input);
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ASSERT_EQ(input, expected);
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}
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