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spu_recompiler: Initialize members

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This commit is contained in:
Megamouse 2026-05-14 09:00:04 +02:00
parent 46364856ae
commit 4cc0e4c7fc
3 changed files with 28 additions and 28 deletions
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6
rpcs3/Emu/Cell/SPUCommonRecompiler.cpp
View File

@ -4430,7 +4430,7 @@ spu_program spu_recompiler_base::analyse(const be_t<u32>* ls, u32 entry_point, s
if (orig < 0x40000)
{
auto& src = ::at32(m_bbs, orig);
const auto& src = ::at32(m_bbs, orig);
bb.reg_const.set_unsafe(i, src.reg_const.test_unsafe(i));
bb.reg_val32[i] = src.reg_val32[i];
}
@ -4773,7 +4773,7 @@ spu_program spu_recompiler_base::analyse(const be_t<u32>* ls, u32 entry_point, s
// Check $LR (alternative return registers are currently not supported)
if (u32 lr_orig = bb.reg_mod[s_reg_lr] ? addr : bb.reg_origin_abs[s_reg_lr]; lr_orig < SPU_LS_SIZE)
{
auto& src = ::at32(m_bbs, lr_orig);
const auto& src = ::at32(m_bbs, lr_orig);
if (src.reg_load_mod[s_reg_lr] != func.reg_save_off[s_reg_lr])
{
@ -4797,7 +4797,7 @@ spu_program spu_recompiler_base::analyse(const be_t<u32>* ls, u32 entry_point, s
{
if (u32 orig = bb.reg_mod.test_unsafe(i) ? addr : bb.reg_origin_abs[i]; orig < SPU_LS_SIZE)
{
auto& src = ::at32(m_bbs, orig);
const auto& src = ::at32(m_bbs, orig);
if (src.reg_load_mod[i] != func.reg_save_off[i])
{

38
rpcs3/Emu/Cell/SPULLVMRecompiler.cpp
View File

@ -76,10 +76,10 @@ class spu_llvm_recompiler : public spu_recompiler_base, public cpu_translator
u32 m_op_const_mask = -1;
// Current function chunk entry point
u32 m_entry;
u32 m_entry = 0;
// Main entry point offset
u32 m_base;
u32 m_base = 0;
// Module name
std::string m_hash;
@ -91,26 +91,26 @@ class spu_llvm_recompiler : public spu_recompiler_base, public cpu_translator
u32 m_next_op = 0;
// Current function (chunk)
llvm::Function* m_function;
llvm::Function* m_function{};
llvm::Value* m_thread;
llvm::Value* m_lsptr;
llvm::Value* m_interp_op;
llvm::Value* m_interp_pc;
llvm::Value* m_interp_table;
llvm::Value* m_interp_7f0;
llvm::Value* m_interp_regs;
llvm::Value* m_thread{};
llvm::Value* m_lsptr{};
llvm::Value* m_interp_op{};
llvm::Value* m_interp_pc{};
llvm::Value* m_interp_table{};
llvm::Value* m_interp_7f0{};
llvm::Value* m_interp_regs{};
// Helpers
llvm::Value* m_base_pc;
llvm::Value* m_interp_pc_next;
llvm::BasicBlock* m_interp_bblock;
llvm::Value* m_base_pc{};
llvm::Value* m_interp_pc_next{};
llvm::BasicBlock* m_interp_bblock{};
// i8*, contains constant vm::g_base_addr value
llvm::Value* m_memptr;
llvm::Value* m_memptr{};
// Pointers to registers in the thread context
std::array<llvm::Value*, s_reg_max> m_reg_addr;
std::array<llvm::Value*, s_reg_max> m_reg_addr{};
// Global variable (function table)
llvm::GlobalVariable* m_function_table{};
@ -130,10 +130,10 @@ class spu_llvm_recompiler : public spu_recompiler_base, public cpu_translator
// Chunk for external tail call (dispatch)
llvm::Function* m_dispatch{};
llvm::MDNode* m_md_unlikely;
llvm::MDNode* m_md_likely;
llvm::MDNode* m_md_spu_memory_domain;
llvm::MDNode* m_md_spu_context_domain;
llvm::MDNode* m_md_unlikely{};
llvm::MDNode* m_md_likely{};
llvm::MDNode* m_md_spu_memory_domain{};
llvm::MDNode* m_md_spu_context_domain{};
struct block_info
{

12
rpcs3/Emu/Cell/SPURecompiler.h
View File

@ -361,7 +361,7 @@ public:
spu_itype_t mod3_type = spu_itype::UNK;
u32 IMM = 0;
private:
private:
// Internal, please access using fixed order
spu_itype_t access_type(u32 i) const
{
@ -380,7 +380,7 @@ private:
return spu_itype::UNK;
}
public:
public:
spu_itype_t reverse1_type()
{
@ -697,15 +697,15 @@ public:
protected:
spu_runtime* m_spurt{};
u32 m_pos;
u32 m_size;
u64 m_hash_start;
u32 m_pos = 0;
u32 m_size = 0;
u64 m_hash_start = 0;
// Bit indicating start of the block
bit_set<SPU_LS_SIZE / 4> m_block_info;
// GPR modified by the instruction (-1 = not set)
std::array<u8, SPU_LS_SIZE / 4> m_regmod;
std::array<u8, SPU_LS_SIZE / 4> m_regmod {};
bit_set<SPU_LS_SIZE / 4> m_use_ra;
bit_set<SPU_LS_SIZE / 4> m_use_rb;