SPU LLVM: Disable NaN rulling-out in Reduced Loop on ARM64

This commit is contained in:
Elad 2026-07-06 19:36:54 +03:00
parent 8566d4f8b4
commit 7d1076aff9

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@ -685,7 +685,11 @@ public:
bool is_gpr_not_NaN_hint(u32 i) const noexcept
{
#ifdef ARCH_X64
return gpr_not_nans.test(i);
#else
return false;
#endif
}
origin_t get_reg(u32 reg_val) noexcept