From 81d657a960f26902e20c213db3febf6d4e11d746 Mon Sep 17 00:00:00 2001 From: kd-11 Date: Sun, 7 Dec 2025 21:36:27 +0300 Subject: [PATCH] rsx/cfg: Fix grouping barrier16 instructions when lane is shared. --- .../Program/Assembler/Passes/FP/RegisterDependencyPass.cpp | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/rpcs3/Emu/RSX/Program/Assembler/Passes/FP/RegisterDependencyPass.cpp b/rpcs3/Emu/RSX/Program/Assembler/Passes/FP/RegisterDependencyPass.cpp index 0f528f66f3..b7e3dc2116 100644 --- a/rpcs3/Emu/RSX/Program/Assembler/Passes/FP/RegisterDependencyPass.cpp +++ b/rpcs3/Emu/RSX/Program/Assembler/Passes/FP/RegisterDependencyPass.cpp @@ -161,10 +161,11 @@ namespace rsx::assembler::FP const u32 src_reg_id = reg.reg.id / 2; const bool is_odd_reg = !!(reg.reg.id & 1); + const bool is_odd_ch = !!(ch & 1); const bool is_word0 = ch < 2; - // If we're a non-odd register, we should also write the next channel (y/w) - if (!is_odd_reg && (mask & 2)) + // If we're an even channel, we should also write the next channel (y/w) + if (!is_odd_ch && (mask & 2)) { mask >>= 1; ++ch;