Commit Graph

743 Commits

Author SHA1 Message Date
schm1dtmac
b34eba2fb3 Revert PPUThread changes
Causes GOW3 segfaults at the end of PPU linking
2026-05-09 17:56:04 +03:00
AurisDSP
6850e2e5a8 Apple Silicon: consolidate JIT W^X handling with RAII guards
Address review feedback on #18701 (cc @elad335): combine the SPU
worker fix from #18701, the SPRX Loader fix from #18703, and three
additional similar W^X leaks discovered while auditing the codebase
for the same pattern. Use Allman-style braces to match RPCS3 coding
style.

Background:
On AArch64 Apple Silicon, MAP_JIT pages enforce W^X per-thread.
pthread_jit_write_protect_np(false) enables write mode and
pthread_jit_write_protect_np(true) restores execute mode. When code
takes an early return or throws between these calls, the thread is
left in write mode, which can cause segfaults on subsequent code
fetches or inconsistent state at thread teardown.

Fixes applied (all gated on __APPLE__):

1. Emu/Cell/SPUCommonRecompiler.cpp - SPU cache worker thread
   Add RAII guard so execute mode is restored on worker exit.

2. Emu/System.cpp - SPRX Loader thread
   Enter write mode (was missing entirely) so ppu_initialize() and
   ppu_precompile() can write to MAP_JIT pages, and pair with an
   RAII guard. Reproducer: Red Dead Redemption (BLUS30418) crashes
   ~12s into boot at 0x300010000 without this fix.

3. Emu/Cell/SPULLVMRecompiler.cpp - SPU LLVM compile path
   The compile function enters write mode, then has an early
   "return nullptr" path on rebuild_ubertrampoline failure that
   skipped the explicit restore. Add RAII guard so execute mode
   is restored on every exit path. The existing explicit restore
   before the cache-flush asm directives is preserved.

4. Emu/Cell/PPUThread.cpp - PPU LLVM worker thread (operator())
   Worker entered write mode but never restored it on operator()
   return. Add RAII guard.

5. Emu/Cell/PPUThread.cpp - ppu_initialize() main path
   This scope alternates write/execute mode and contains an early
   "return compiled_new" at the empty-jits check plus a final
   return that both leak write mode. Add RAII guard so execute
   mode is always restored on exit. Intermediate explicit
   transitions for the symbol-resolver invocation are preserved.

No behavioral change on x86_64 or non-Apple ARM64 (all changes are
inside #ifdef __APPLE__ / #if defined(__APPLE__)).

Supersedes #18703.
2026-05-09 15:07:22 +03:00
Megamouse
f92677fa7e rsx: Add missing break 2026-03-30 14:26:50 +02:00
Elad
e83034624b SPU Debugger: Measure rate of block ran 2026-03-26 13:55:00 +02:00
RipleyTom
2f9f79eea2 PPU Fixes
-CallFunction empty function/jump elision was never gone through as cond was always false
-MSelf duplicate offset detection never triggered because set was reset each loop
-Rel executable memory size calculation used wrong section type
2026-03-06 10:49:59 +02:00
Megamouse
53edd410c7 ppu: move alignment below llvm check 2025-11-30 09:23:36 +00:00
Elad
e09be04df6 Emu/UX: Automatic Cache Precompilation for PKG instal
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2025-11-29 10:47:51 +02:00
FeTetra
9deb6cd4fa
Fix ppu_register_function_at with unaligned parameters (#17718)
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This fixes some crashes in interpreter mode when calling functions like
`sys_dbg_write_process_memory` to write data which may not be an
instruction.

---------

Co-authored-by: Elad <18193363+elad335@users.noreply.github.com>
2025-11-21 16:07:47 +02:00
Elad
5893851029 Core: Remove Intel-TSX ISA Extension based code 2025-11-17 10:32:08 +02:00
Marin Baron
41a122a266 [Build] Explicit Triple with LLVM 21.1.0 2025-10-15 20:09:21 +02:00
isJuhn
6451c4d49f Fix calloc patches in the middle of blocks 2025-09-25 15:17:21 +03:00
Elad
29108e1cb4 PPU LLVM: Filter out functions with patches
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2025-09-22 17:03:31 +03:00
Elad
ffeb16fe1e
Win32: Respect home space / shadow space on the stack frame (#17514)
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Previous code did not respect the 32-byte long area on the stack frame
called the home space - area on the stack frame area that is specific to
Microsoft's x64 calling convention, leading to corrupted values after a
callback.
Bug noticed by @capriots

Co-Authored-By: capriots <29807355+capriots@users.noreply.github.com>
2025-09-19 11:46:39 +03:00
Elad
0564842871 SPU: Restore postponed LR notifications (with tweaks)
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2025-09-06 00:05:46 +03:00
Elad
cfe1eca185 SPU: Reimplement reservation notifications 2025-09-05 11:11:03 +03:00
oltolm
ac99b2036d llvm: fix deprecation warnings 2025-06-07 12:46:48 +03:00
Vestral
63b7134dce Separate segment and function addresses in PPU LLVM 2025-04-30 02:56:23 +02:00
Vestral
e2df71d87c Enable ASLR 2025-04-30 02:56:23 +02:00
elad335
8437a5f5ac PPU Debugger/Memory: STDCX/STWCX breakpoints, make vm::_ref const
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2025-04-19 16:14:00 +03:00
Megamouse
5526c33d69 Review fixes + warning fixes
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2025-03-31 18:27:54 +02:00
elad335
047f71b434 PPU/cellSpurs: MGS4: Fix cellSpursAddUrgentCommand race condition
cellSpursAddUrgentCommand searches in 4 slots for an empty slot to put the command at.
At first, it seems to do so unordered.

Meanwhile, on SPU side, it expects an order between all the commands because it pops them it in FIFO manner.
Not keeping track of how many commands are queued in total.

After second observation of cellSpursAddUrgentCommand, something odd comes takes places here.
Usually, reservation loops are individual and are expected to be closed without any changes of the previous loop affected by the proceeding one.
But in this case, after a single failure, the entire operayion is reset, a loop of 4 reservation operations suddenly is reset completely.

This makes one wonder if it the HW expects sometjing else here, perhaps it caches the reservation internally here?
After some adjustments to LDARX and STDCX to cache the reservation between succeeding loops, Metal Gear Solid 4 no longer freezes!
2025-03-28 19:56:54 +03:00
trigger
af23df842d
PPU: Report encrypted modules with KLIC in main file, opportunistic compilation at exit-spawn (#16743) 2025-03-01 11:45:03 +02:00
Elad
207ee59acd PPU Analyzer: Firmware/import caller analysis and KLIC finding pass
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2025-02-27 12:32:21 +02:00
RipleyTom
cd87a64621 Headers cleanup 2025-02-11 20:38:35 +01:00
Elad
86b7078464 PPU LLVM: Fix compilation of PRX with no relocations 2025-02-07 20:27:17 +02:00
kd-11
6123838a48 ppu/arm64: Fix ppu_recompiler_fallback implementation for ARM processors 2025-02-02 22:44:42 +03:00
Megamouse
3187dc816e Fix some warnings 2025-02-02 17:06:39 +01:00
Elad
665bb83297
Fix Savestates recent regression 2025-01-28 18:49:19 +02:00
Elad
7fc0f69e48 PPU LLVM: Fix HLE patches 2025-01-28 12:51:52 +02:00
Megamouse
67703b49d8 Update LLVM to 18.1.8 2025-01-25 18:15:13 +01:00
Megamouse
ad6eba1670 Fix some warnings 2025-01-25 17:06:35 +01:00
Elad
5ef442c2b8 Disable ARM trampolines 2025-01-25 12:47:44 +02:00
Elad
4c0832e6e6 PPU LLVM: Reduce size of JIT-transition treampolines to 16 2025-01-25 12:47:44 +02:00
Elad
3f4210437d JIT.h: Add option for lowered function size 2025-01-25 12:47:44 +02:00
Elad
81d0dd686b LLVM: Add explicit resource-freeing at emulation stop 2025-01-25 12:47:44 +02:00
Elad
a24e747e16 PPU LLVM: Disable an experimental limit 2025-01-25 12:47:44 +02:00
Elad
05f52246a2 PPU LLVM: Simplify module progress
Do not mix module compilation with linking.
2025-01-25 12:47:44 +02:00
Elad
857eac3d10 PPU Analyzer: Remove ppu_function::name to lower sizeof(ppu_function) 2025-01-25 12:47:44 +02:00
Elad
9d5b75bb7a LLVM: Slice PPU executable memory 2025-01-25 12:47:44 +02:00
Elad
c6f3737c2a PPU LLVM: Fixup patches enlisting in analyzer 2025-01-07 20:42:45 +02:00
Elad
0b784ff2c1 PPU LLVM: Function table dependent resolver hashing 2025-01-07 15:43:41 +02:00
Elad
575a245f8d
IDM: Implement lock-free smart pointers (#16403)
Replaces `std::shared_pointer` with `stx::atomic_ptr` and `stx::shared_ptr`.

Notes to programmers:

* This pr kills the use of `dynamic_cast`, `std::dynamic_pointer_cast` and `std::weak_ptr` on IDM objects, possible replacement is to save the object ID on the base object, then use idm::check/get_unlocked to the destination type via the saved ID which may be null. Null pointer check is how you can tell type mismatch (as dynamic cast) or object destruction (as weak_ptr locking).
* Double-inheritance on IDM objects should be used with care, `stx::shared_ptr` does not support constant-evaluated pointer offsetting to parent/child type.
* `idm::check/get_unlocked` can now be used anywhere.

Misc fixes:
* Fixes some segfaults with RPCN with interaction with IDM.
* Fix deadlocks in access violation handler due locking recursion.
* Fixes race condition in process exit-spawn on memory containers read.
* Fix bug that theoretically can prevent RPCS3 from booting - fix `id_manager::typeinfo` comparison to compare members instead of `memcmp` which can fail spuriously on padding bytes.
* Ensure all IDM inherited types of base, either has `id_base` or `id_type` defined locally, this allows to make getters such as `idm::get_unlocked<lv2_socket, lv2_socket_raw>()` which were broken before. (requires save-states invalidation)
* Removes broken operator[] overload of `stx::shared_ptr` and `stx::single_ptr` for non-array types.
2024-12-22 20:59:48 +02:00
Elad
b4505600c7 PPU: Notify SPUs while waiting for its own state 2024-11-30 18:06:34 +02:00
Elad
a4ea71d18f CELL: Rewrite reservation notification postponing 2024-11-30 18:06:34 +02:00
Elad
68d74bc28a Progress Dialog: Fix recursion and concurrency use of text updates 2024-11-16 12:22:23 +02:00
Megamouse
7866dc2e34 overlays: localize RPCS3 progress dialog 2024-11-15 09:48:12 +01:00
kd-11
be0ef0cc28 macos - Fix crash executing resolver 2024-08-24 14:13:14 +03:00
kd-11
c2f5de1c55 Fix compiler warnings about unused args for aarch64 2024-08-20 05:18:53 +03:00
Elad Ashkenazi
46ceeed10d Debugger/PPU: Minor bugfix in CR register dump 2024-08-15 14:05:25 +03:00
Elad Ashkenazi
d0ebba6c5e CELL: New reservation notifications mechanism 2024-08-14 11:53:00 +03:00