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https://github.com/shadps4-emu/shadPS4.git
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Revert quad/rect list parameter forwarding changes (#4476)
* Revert "shader_recompiler: Pad number of TES passthrough outputs to fragment inputs if needed" This reverts commit6436063025. * Revert "shader_recompiler: Only forward declared number of vertex inputs. (#4293)" This reverts commit47f5cc1437.
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19381b30e8
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@ -12,9 +12,8 @@ using Sirit::Id;
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constexpr u32 SPIRV_VERSION_1_5 = 0x00010500;
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constexpr u32 SPIRV_VERSION_1_5 = 0x00010500;
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struct QuadRectListEmitter : public Sirit::Module {
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struct QuadRectListEmitter : public Sirit::Module {
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explicit QuadRectListEmitter(const VertexRuntimeInfo& vs_info_,
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explicit QuadRectListEmitter(const FragmentRuntimeInfo& fs_info_)
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const FragmentRuntimeInfo& fs_info_)
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: Sirit::Module{SPIRV_VERSION_1_5}, fs_info{fs_info_} {
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: Sirit::Module{SPIRV_VERSION_1_5}, vs_info{vs_info_}, fs_info{fs_info_} {
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void_id = TypeVoid();
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void_id = TypeVoid();
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bool_id = TypeBool();
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bool_id = TypeBool();
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float_id = TypeFloat(32);
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float_id = TypeFloat(32);
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@ -25,11 +24,9 @@ struct QuadRectListEmitter : public Sirit::Module {
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vec3_id = TypeVector(float_id, 3);
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vec3_id = TypeVector(float_id, 3);
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vec4_id = TypeVector(float_id, 4);
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vec4_id = TypeVector(float_id, 4);
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float_zero = Constant(float_id, 0.0f);
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float_one = Constant(float_id, 1.0f);
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float_one = Constant(float_id, 1.0f);
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float_min_one = Constant(float_id, -1.0f);
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float_min_one = Constant(float_id, -1.0f);
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int_zero = Constant(int_id, 0);
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int_zero = Constant(int_id, 0);
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vec4_zero = ConstantComposite(vec4_id, float_zero, float_zero, float_zero, float_zero);
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const Id float_arr{TypeArray(float_id, Constant(uint_id, 1U))};
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const Id float_arr{TypeArray(float_id, Constant(uint_id, 1U))};
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gl_per_vertex_type = TypeStruct(vec4_id, float_id, float_arr, float_arr);
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gl_per_vertex_type = TypeStruct(vec4_id, float_id, float_arr, float_arr);
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@ -192,14 +189,8 @@ struct QuadRectListEmitter : public Sirit::Module {
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OpStore(OpAccessChain(output_vec4, gl_per_vertex, Int(0)), position);
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OpStore(OpAccessChain(output_vec4, gl_per_vertex, Int(0)), position);
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// out_paramN = in_paramN[index];
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// out_paramN = in_paramN[index];
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for (int i = 0; i < outputs.size(); i++) {
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for (int i = 0; i < inputs.size(); i++) {
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Id param;
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const Id param{OpLoad(vec4_id, OpAccessChain(input_vec4, inputs[i], index))};
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if (i < inputs.size()) {
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param = OpLoad(vec4_id, OpAccessChain(input_vec4, inputs[i], index));
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} else {
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// Not enough inputs to forward, use dummy value.
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param = vec4_zero;
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}
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OpStore(outputs[i], param);
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OpStore(outputs[i], param);
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}
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}
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@ -245,7 +236,6 @@ private:
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}
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}
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void DefineOutputs(spv::ExecutionModel model) {
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void DefineOutputs(spv::ExecutionModel model) {
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auto num_forwards = vs_info.num_exports;
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if (model == spv::ExecutionModel::TessellationControl) {
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if (model == spv::ExecutionModel::TessellationControl) {
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const Id gl_per_vertex_array{TypeArray(gl_per_vertex_type, Constant(uint_id, 4U))};
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const Id gl_per_vertex_array{TypeArray(gl_per_vertex_type, Constant(uint_id, 4U))};
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gl_out = AddOutput(gl_per_vertex_array);
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gl_out = AddOutput(gl_per_vertex_array);
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@ -261,12 +251,9 @@ private:
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Decorate(gl_tess_level_outer, spv::Decoration::Patch);
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Decorate(gl_tess_level_outer, spv::Decoration::Patch);
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} else {
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} else {
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gl_per_vertex = AddOutput(gl_per_vertex_type);
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gl_per_vertex = AddOutput(gl_per_vertex_type);
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// Tessellation eval stage comes before fragment, output number of forwards it will
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// actually accept.
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num_forwards = fs_info.num_inputs;
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}
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}
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outputs.reserve(num_forwards);
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outputs.reserve(fs_info.num_inputs);
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for (int i = 0; i < num_forwards; i++) {
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for (int i = 0; i < fs_info.num_inputs; i++) {
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const auto& input = fs_info.inputs[i];
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const auto& input = fs_info.inputs[i];
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if (input.IsDefault()) {
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if (input.IsDefault()) {
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continue;
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continue;
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@ -289,10 +276,8 @@ private:
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const Id gl_per_vertex_array{TypeArray(gl_per_vertex_type, Constant(uint_id, 32U))};
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const Id gl_per_vertex_array{TypeArray(gl_per_vertex_type, Constant(uint_id, 32U))};
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gl_in = AddInput(gl_per_vertex_array);
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gl_in = AddInput(gl_per_vertex_array);
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const Id float_arr{TypeArray(vec4_id, Int(32))};
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const Id float_arr{TypeArray(vec4_id, Int(32))};
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inputs.reserve(fs_info.num_inputs);
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const auto num_forwards = vs_info.num_exports;
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for (int i = 0; i < fs_info.num_inputs; i++) {
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inputs.reserve(num_forwards);
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for (int i = 0; i < num_forwards; i++) {
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const auto& input = fs_info.inputs[i];
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const auto& input = fs_info.inputs[i];
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if (input.IsDefault()) {
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if (input.IsDefault()) {
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continue;
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continue;
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@ -303,7 +288,6 @@ private:
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}
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}
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private:
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private:
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VertexRuntimeInfo vs_info;
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FragmentRuntimeInfo fs_info;
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FragmentRuntimeInfo fs_info;
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Id main;
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Id main;
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Id void_id;
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Id void_id;
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@ -315,11 +299,9 @@ private:
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Id vec2_id;
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Id vec2_id;
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Id vec3_id;
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Id vec3_id;
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Id vec4_id;
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Id vec4_id;
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Id float_zero;
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Id float_one;
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Id float_one;
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Id float_min_one;
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Id float_min_one;
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Id int_zero;
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Id int_zero;
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Id vec4_zero;
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Id gl_per_vertex_type;
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Id gl_per_vertex_type;
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Id gl_in;
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Id gl_in;
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union {
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union {
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@ -337,9 +319,8 @@ private:
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std::vector<Id> interfaces;
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std::vector<Id> interfaces;
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};
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};
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std::vector<u32> EmitAuxilaryTessShader(AuxShaderType type, const VertexRuntimeInfo& vs_info,
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std::vector<u32> EmitAuxilaryTessShader(AuxShaderType type, const FragmentRuntimeInfo& fs_info) {
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const FragmentRuntimeInfo& fs_info) {
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QuadRectListEmitter ctx{fs_info};
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QuadRectListEmitter ctx{vs_info, fs_info};
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switch (type) {
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switch (type) {
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case AuxShaderType::RectListTCS:
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case AuxShaderType::RectListTCS:
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ctx.EmitRectListTCS();
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ctx.EmitRectListTCS();
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@ -8,8 +8,7 @@
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namespace Shader {
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namespace Shader {
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struct FragmentRuntimeInfo;
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struct FragmentRuntimeInfo;
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struct VertexRuntimeInfo;
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}
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} // namespace Shader
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namespace Shader::Backend::SPIRV {
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namespace Shader::Backend::SPIRV {
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@ -20,7 +19,6 @@ enum class AuxShaderType : u32 {
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};
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};
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[[nodiscard]] std::vector<u32> EmitAuxilaryTessShader(AuxShaderType type,
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[[nodiscard]] std::vector<u32> EmitAuxilaryTessShader(AuxShaderType type,
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const VertexRuntimeInfo& vs_info,
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const FragmentRuntimeInfo& fs_info);
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const FragmentRuntimeInfo& fs_info);
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} // namespace Shader::Backend::SPIRV
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} // namespace Shader::Backend::SPIRV
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@ -5,19 +5,10 @@
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#include "shader_recompiler/ir/basic_block.h"
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#include "shader_recompiler/ir/basic_block.h"
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#include "shader_recompiler/ir/ir_emitter.h"
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#include "shader_recompiler/ir/ir_emitter.h"
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#include "shader_recompiler/ir/program.h"
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#include "shader_recompiler/ir/program.h"
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#include "shader_recompiler/profile.h"
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namespace Shader {
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namespace Shader {
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void InjectClipDistanceAttributes(IR::Program& program, RuntimeInfo& runtime_info,
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void InjectClipDistanceAttributes(IR::Program& program, RuntimeInfo& runtime_info) {
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const Profile& profile) {
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if (program.info.stage == Stage::Vertex && profile.needs_clip_distance_emulation &&
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program.info.stores.GetAny(IR::Attribute::ClipDistance)) {
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// Increment to include the added clip distance export.
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++runtime_info.vs_info.num_exports;
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return;
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}
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auto& info = runtime_info.fs_info;
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auto& info = runtime_info.fs_info;
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if (!info.clip_distance_emulation || program.info.l_stage != LogicalStage::Fragment) {
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if (!info.clip_distance_emulation || program.info.l_stage != LogicalStage::Fragment) {
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@ -8,8 +8,7 @@
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namespace Shader {
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namespace Shader {
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struct Profile;
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struct Profile;
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void InjectClipDistanceAttributes(IR::Program& program, RuntimeInfo& runtime_info,
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void InjectClipDistanceAttributes(IR::Program& program, RuntimeInfo& runtime_info);
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const Profile& profile);
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} // namespace Shader
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} // namespace Shader
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namespace Shader::Optimization {
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namespace Shader::Optimization {
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@ -61,7 +61,7 @@ IR::Program TranslateProgram(const std::span<const u32>& code, Pools& pools, Inf
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// On NVIDIA GPUs HW interpolation of clip distance values seems broken, and we need to emulate
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// On NVIDIA GPUs HW interpolation of clip distance values seems broken, and we need to emulate
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// it with expensive discard in PS.
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// it with expensive discard in PS.
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Shader::InjectClipDistanceAttributes(program, runtime_info, profile);
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Shader::InjectClipDistanceAttributes(program, runtime_info);
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// Run optimization passes
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// Run optimization passes
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if (!profile.support_float64) {
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if (!profile.support_float64) {
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@ -95,7 +95,6 @@ using OutputMap = std::array<Output, 4>;
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struct VertexRuntimeInfo : protected CommonEsVsRuntimeInfo {
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struct VertexRuntimeInfo : protected CommonEsVsRuntimeInfo {
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u32 num_outputs;
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u32 num_outputs;
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u32 num_exports;
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std::array<OutputMap, 3> outputs;
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std::array<OutputMap, 3> outputs;
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bool tess_emulated_primitive{};
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bool tess_emulated_primitive{};
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bool emulate_depth_negative_one_to_one{};
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bool emulate_depth_negative_one_to_one{};
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@ -193,9 +193,8 @@ GraphicsPipeline::GraphicsPipeline(
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} else if (is_rect_list || is_quad_list) {
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} else if (is_rect_list || is_quad_list) {
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const auto type = is_quad_list ? AuxShaderType::QuadListTCS : AuxShaderType::RectListTCS;
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const auto type = is_quad_list ? AuxShaderType::QuadListTCS : AuxShaderType::RectListTCS;
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if (!preloading) {
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if (!preloading) {
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const auto& vs_info = runtime_infos[u32(Shader::LogicalStage::Vertex)].vs_info;
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const auto& fs_info = runtime_infos[u32(Shader::LogicalStage::Fragment)].fs_info;
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const auto& fs_info = runtime_infos[u32(Shader::LogicalStage::Fragment)].fs_info;
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sdata.tcs = Shader::Backend::SPIRV::EmitAuxilaryTessShader(type, vs_info, fs_info);
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sdata.tcs = Shader::Backend::SPIRV::EmitAuxilaryTessShader(type, fs_info);
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}
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}
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shader_stages.emplace_back(vk::PipelineShaderStageCreateInfo{
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shader_stages.emplace_back(vk::PipelineShaderStageCreateInfo{
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.stage = vk::ShaderStageFlagBits::eTessellationControl,
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.stage = vk::ShaderStageFlagBits::eTessellationControl,
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@ -212,10 +211,9 @@ GraphicsPipeline::GraphicsPipeline(
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});
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});
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} else if (is_rect_list || is_quad_list) {
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} else if (is_rect_list || is_quad_list) {
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if (!preloading) {
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if (!preloading) {
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const auto& vs_info = runtime_infos[u32(Shader::LogicalStage::Vertex)].vs_info;
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const auto& fs_info = runtime_infos[u32(Shader::LogicalStage::Fragment)].fs_info;
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const auto& fs_info = runtime_infos[u32(Shader::LogicalStage::Fragment)].fs_info;
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sdata.tes = Shader::Backend::SPIRV::EmitAuxilaryTessShader(
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sdata.tes = Shader::Backend::SPIRV::EmitAuxilaryTessShader(
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AuxShaderType::PassthroughTES, vs_info, fs_info);
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AuxShaderType::PassthroughTES, fs_info);
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}
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}
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shader_stages.emplace_back(vk::PipelineShaderStageCreateInfo{
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shader_stages.emplace_back(vk::PipelineShaderStageCreateInfo{
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.stage = vk::ShaderStageFlagBits::eTessellationEvaluation,
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.stage = vk::ShaderStageFlagBits::eTessellationEvaluation,
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@ -134,7 +134,6 @@ const Shader::RuntimeInfo& PipelineCache::BuildRuntimeInfo(Stage stage, LogicalS
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info.vs_info.step_rate_0 = regs.vgt_instance_step_rate_0;
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info.vs_info.step_rate_0 = regs.vgt_instance_step_rate_0;
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info.vs_info.step_rate_1 = regs.vgt_instance_step_rate_1;
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info.vs_info.step_rate_1 = regs.vgt_instance_step_rate_1;
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info.vs_info.num_outputs = MapOutputs(info.vs_info.outputs, regs.vs_output_control);
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info.vs_info.num_outputs = MapOutputs(info.vs_info.outputs, regs.vs_output_control);
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info.vs_info.num_exports = regs.vs_output_config.NumExports();
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info.vs_info.emulate_depth_negative_one_to_one =
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info.vs_info.emulate_depth_negative_one_to_one =
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!instance.IsDepthClipControlSupported() &&
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!instance.IsDepthClipControlSupported() &&
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regs.clipper_control.clip_space == AmdGpu::ClipSpace::MinusWToW;
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regs.clipper_control.clip_space == AmdGpu::ClipSpace::MinusWToW;
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