Commit Graph

248 Commits

Author SHA1 Message Date
TheTurtle
e16ba06ab0
shader_recompiler: Support 32 thread sharing mode (#4110) 2026-03-09 17:33:58 +02:00
Pavel
89e74828e6
fixup r128 (#4100) 2026-03-05 22:44:37 +02:00
kalaposfos13
c2a47d2a99
Handle operand fields execlo and exechi for S_MOV (#4023)
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Co-authored-by: TheTurtle <geoster3d@gmail.com>
2026-02-11 16:00:13 +02:00
Marcin Mikołajczyk
c81ebe6418
Implement V_FFBH_I32 (#3965)
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2026-01-27 23:08:26 +02:00
Marcin Mikołajczyk
1473b2358a
Implement V_CMP_OP_F64 (#3962) 2026-01-27 20:18:05 +02:00
Marcin Mikołajczyk
1e059cac04
Implement V_LSHR_B64 (#3961) 2026-01-27 12:27:56 +02:00
TheTurtle
d3ad728ac0
vector_alu: Handle -1 as src1 in v_cmp_u64 (#3855) 2025-12-06 15:11:29 -08:00
psucien
a9f8eaf778
video_core: Initial implementation of pipeline cache (#3816)
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* Initial implementation

* Fix for crash caused by stale stages data; cosmetics applied

* Someone mentioned the assert

* Async blob writer

* Fix for memory leak

* Remain stuff

* Async changed to `packaged_task`
2025-11-29 11:52:08 +02:00
Stephen Miller
6295c32e5c
Render.Recompiler: Implement V_FLOOR_F64 (#3828)
* VectorFpRound64 decode table

Also fixed definition for V_TRUNC_F64, though I doubt that would change anything important.

* V_FLOOR_F64 implementation

Used by Just Cause 4

* Oops

Never forget your 64s
2025-11-24 23:51:06 -08:00
TheTurtle
f1a8b7d85e
vector_alu: Fix V_CMP_U64 (#3823)
* vector_alu: Fix V_CMP_U64

* vector_alu: Also handle vcc in V_CMP_U64
2025-11-23 17:26:34 -08:00
Stephen Miller
683e5f3b04
Core: Simulate write-only file access with read-write access (#3360)
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* Swap write access mode for read write

Opening with access mode w will erase the opened file. We do not want this.

* Create mode

Opening with write access was previously the only way to create a file through open, so add a separate FileAccessMode that uses the write access mode to create files.

* Update file_system.cpp

Remove a hack added to posix_rename to bypass the file clearing behaviors of FileAccessMode::Write

* Check access mode in read functions

Write-only files cause the EBADF return on the various read functions. Now that we're opening files differently, properly handling this is necessary.

* Separate appends into proper modes

Fixes a potential regression from one of my prior PRs, and ensures the Write | Append flag combo also behaves properly in read-related functions.

* Move IsWriteOnly check after device/socket reads

file->f is only valid for files, so checking this before checking for sockets/devices will cause access violations.

* Fix issues

Now that Write is identical to ReadWrite, internal uses of Write need to be swapped to my new Create mode

* Fix remaining uses of FileAccessMode write to create files

Missed these before.

* Fix rebase

* Add stubbed get_authinfo (#3722)

* mostly stubbed get_authinfo

* Return value observed on console if get_authinfo was called for the current thread, esrch otherwise

---------

Co-authored-by: kalaposfos13 <153381648+kalaposfos13@users.noreply.github.com>
Co-authored-by: georgemoralis <giorgosmrls@gmail.com>
2025-11-04 10:57:26 +02:00
TheTurtle
8f37cfb739
amdgpu: Split liverpool registers and cleanup (#3707)
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2025-10-05 13:42:40 -07:00
DanielSvoboda
eb18382396
Fix: V_MUL_I32_I24 | V_MUL_U32_U24 (#3632)
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2025-09-19 19:05:22 -07:00
squidbus
0eff74223a
shader_recompiler: Implement fallback path for missing shaderFloat16 support. (#3604) 2025-09-18 00:43:47 -07:00
Stephen Miller
0bfde1fcde
video_core: Check DB_SHADER_CONTROL register before performing depth exports (#3588)
The DB_SHADER_CONTROL register has several enable flags which must be set before certain depth exports are enabled.
This commit adds logic to respect the values in this register when performing depth exports, which fixes the regression in earlier versions of KNACK.
I've also renamed DepthBufferControl to DepthShaderControl, since that's closer to the official name for the register.
2025-09-13 04:32:24 -07:00
TheTurtle
374c2194d4
video_core: Address various UE bugs (#3559)
* vk_rasterizer: Reorder image query in fast clear elimination

Fixes missing clears when a texture is being cleared using this method but never actually used for rendering purposes by ensuring the texture cache has at least a chance to register cmask

* shader_recompiler: Partial support for ANCILLARY_ENA

* pixel_format: Add number conversion of BC6 srgb format

* texture_cache: Support aliases of 3D and 2D array images

Used be UE to render its post processing LUT

* pixel_format: Test BC6 srgb as unorm

Still not sure what is up with snorm/unorm can be useful to have both actions to compare for now

* video_core: Use attachment feedback layout instead of general if possible

UE games often do mipgen passes where the previous mip of the image being rendered to is bound for reading. This appears to cause corruption issues so use attachment feedback loop extension to ensure correct output

* renderer_vulkan: Improve feedback loop code

* Set proper usage flag for feedback loop usage
* Add dynamic state extension and enable it for color aspect when necessary
* Check if image is bound instead of force_general for better code consistency

* shader_recompiler: More proper depth export implementation

* shader_recompiler: Fix bug in output modifiers

* shader_recompiler: Fix sampling from MSAA images

This is not allowed by any graphics API but seems hardware supports it somehow and it can be encountered. To avoid glitched output translate to to a texelFetch call on sample 0

* clang format

* image: Add back missing code

* shader_recompiler: Better ancillary implementation

Now is implemented with a custom attribute that is constant propagated depending on which parts of it are extracted. It will assert if an unknown part is used or if the attribute itself is not removed by dead code elim

* copy_shader: Ignore not enabled export channels

* constant_propagation: Invalidate ancillary after successful elimination

* spirv: Fix f11/f10 conversion to f32

---------

Co-authored-by: georgemoralis <giorgosmrls@gmail.com>
2025-09-12 19:29:16 +03:00
TheTurtle
eb9a7e8fbd
liverpool: Write valid queries on PixelPipeStatDump (#3553)
* liverpool: Write valid queries on PixelPipeStatDump

* export: Small assert swap

* liverpool: Advance zpass counter on every dump request
2025-09-07 18:08:26 -07:00
baggins183
df52585086
Allow vector and scalar offset in buffer address arg to LoadBuffer/StoreBuffer (#3439)
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* Allow vector and scalar offset in buffer address arg to
LoadBuffer/StoreBuffer

* remove is_ring check

* fix atomics and update pattern matching for tess factor stores

* remove old asserts about soffset

* small fixes

* copyright

* Handle sgpr initialization for 2 special hull shader values, including tess factor buffer offset
2025-09-03 20:54:23 -07:00
Stephen Miller
c26f56ab02
Handle offsets and format overrides in fetch shaders (#3486)
Co-authored-by: TheTurtle <47210458+raphaelthegreat@users.noreply.github.com>
2025-08-30 14:20:23 -07:00
squidbus
32244c097c
shader_recompiler: Implement V_ADD_F64 and loading 64-bit float from SGPR. (#3483) 2025-08-29 18:11:21 -07:00
Stephen Miller
56626111ab
Properly use float type for float buffer atomics (#3480)
Co-authored-by: TheTurtle <47210458+raphaelthegreat@users.noreply.github.com>
2025-08-29 17:18:10 -07:00
Stephen Miller
6f26f66d77
Handle ExecLo source in S_FF1_I32_B64 (#3481)
Co-authored-by: TheTurtle <47210458+raphaelthegreat@users.noreply.github.com>
2025-08-29 16:59:11 -07:00
TheTurtle
8ae45559fc
vector_interpolation: Address some assertions (#3473) 2025-08-29 13:44:45 -07:00
TheTurtle
6d98a5ab60
vk_pipeline_cache: Cleanup graphics key refresh (#3449)
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* vk_pipeline_cache: Cleanup graphics key refresh

* position: Don't assert on None mapping

Also check outputs in runtime info so shader is recompiled if they change
2025-08-23 17:16:58 -07:00
TheTurtle
6dd2b3090c
shader_recompiler: Improve shader exports accuracy (part 1) (#3447)
* video_core: support for RT layer outputs

- support for RT layer outputs
- refactor for handling of export attributes
- move output->attribute mapping to a separate header

* export: Rework render target exports

- Centralize all code related to MRT exports into a single function to make it easier to follow
- Apply swizzle to output RGBA colors instead of the render target channel.
  This fixes swizzles on formats with < 4 channels

For example with render target format R8_UNORM and COMP_SWAP ALT_REV the previous code would output

frag_color.a = color.r;

instead of

frag_color.r = color.a;

which would result in incorrect output in some cases

* vk_pipeline_cache: Apply swizzle to write masks

---------

Co-authored-by: polyproxy <47796739+polybiusproxy@users.noreply.github.com>
2025-08-23 14:39:59 -07:00
kalaposfos13
8a84f1b778
Implement V_CMP_GT_U64 (#3352)
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* Implement V_CMP_GT_U64

* Add GroupAny

* Use GroupAny

* Add assert

* clang
2025-08-20 19:53:54 -07:00
baggins183
670067c001
Improve heuristic for attributes passed via ring buffers. (#3426)
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Previously a buffer load in a vertex shader could be treated like a ring access, dropping offen vgpr and possibly asserting during resource tracking because of mismatch between types (u32x2 vs U32), caused by inconsistencies in flags (index_enable and offset_enable)
2025-08-17 23:22:40 +03:00
TheTurtle
93767ae31b
shader_recompiler: Rework sharp tracking for robustness (#3327)
* shader_recompiler: Remove remnants of old discard

Also constant propagate conditional discard if condition is constant

* resource_tracking_pass: Rework sharp tracking for robustness

* resource_tracking_pass: Add source dominance analysis

When reachability is not enough to prune source list, check if a source dominates all other sources

* resource_tracking_pass: Fix immediate check

How did this work before

* resource_tracking_pass: Remove unused template type

* readlane_elimination_pass: Don't add phi when all args are the same

New sharp tracking exposed some bad sources coming on sampler sharps with aniso disable pattern that also were part of readlane pattern, fix tracking by removing the unnecessary phis inbetween

* resource_tracking_pass: Allow phi in disable aniso pattern

* resource_tracking_pass: Handle not valid buffer sharp and more phi in aniso pattern
2025-07-28 13:32:16 -07:00
baggins183
116554e425
V_ALIGNBYTE_B32 and V_ALIGNBIT_B32 (#3316)
* implement V_ALIGNBYTE_B32 and V_ALIGNBIT_B32

* fix mask

* uncomment alignbit
2025-07-28 00:27:13 -07:00
TheTurtle
93b06ba2da
translate: Correct instance id fetch in local shader (#3309) 2025-07-23 23:27:11 +03:00
TheTurtle
19c3d05ac1
shader_recompiler: Use VM bit for conditional discard (#3306) 2025-07-23 20:58:09 +03:00
TheTurtle
4d3578edbe
shader_recompiler: Fix incorrect bary coord loads when unsupported (#3303)
* shader_recompiler: Fix incorrect bary coord loads when unsupported

Also properly set sample rate shading

* emit_spirv: Implement BaryCoordSmoothCentroid
2025-07-23 19:46:06 +03:00
baggins183
3019bfb978
Implement MUBUF instructions for shorts/bytes (#2856)
* implement loads/store instructions for types smaller than dwords

* initialize s16/s8 types

* set profile for int8/16/64

* also need to zero extend u8/u16 to u32 result

* document unrelated bugs with atomic fmin/max

* remove profile checks and simple emit for added opcodes

---------

Co-authored-by: georgemoralis <giorgosmrls@gmail.com>
2025-07-18 12:04:50 +03:00
Marcin Mikołajczyk
6d6068e0e2
Fix ff1_i32_b64 not accepting vcc as its argument (#3251) 2025-07-15 11:39:37 -07:00
TheTurtle
4407ebdd9b
shader_recompiler: Implement guest barycentrics (#3245)
* shader_recompiler: Implement guest barycentrics

* Review comments and some cleanup
2025-07-15 18:49:12 +03:00
TheTurtle
399a725343
shader_recompiler: Replace buffer pulling with attribute divisor for instance step rates (#3238)
* shader_recompiler: Replace buffer pulling with attribute divisor for instance step rates

* flatten_extended_userdata: Remove special step rate buffer handling

* Review comments

* spirv_emit_context: Name all instance rate attribs properly

* spirv: Merge ReadConstBuffer again

template function only has 1 user now

* attribute: Add missing attributes

* translate: Reimplement step rate instance id

* Resolve validation warnings

* shader_recompiler: Separate vertex inputs from LS stage, cleanup tess
2025-07-14 00:32:02 +03:00
TheTurtle
8bc30270c8
shader_recompiler: Implement ff1 with subgroup ops (#3225) 2025-07-10 21:52:56 +03:00
kalaposfos13
ee97c5c110
Define S_TRAP as InstCategory::FlowControl (#3223) 2025-07-10 13:53:38 +03:00
TheTurtle
27cbd6647f
shader_recompiler: Reorganize data share operations and implement GDS bit (#3222)
* shader_recompiler: Reorganize data share operations and implement GDS bit

* Review comments
2025-07-10 13:38:50 +03:00
IndecisiveTurtle
dc6ef99dc7 vector_memory: Handle immediate but non zero offset too
Signed-off-by: georgemoralis <giorgosmrls@gmail.com>
2025-07-09 18:40:05 +03:00
TheTurtle
7d4b875ee3
Random fixes (#3216)
* buffer_cache: Handle inline data to flexible memory

* control_flow: Fix single instruction scopes edge case

Fixes the following pattern

v_cmpx_gt_u32 cond
buffer_store_dword value
.LABEL:

Before
buffer[index] = value;

After
if (cond)
{
    buffer[index] = value;
}

* vector_memory: Handle soffset when offen is false

When offen is not used we can substitute the offset argument with soffset and have it handled correctly

* scalar_alu: Handle sharp moves with S_MOV_B64

This fixes unable to track sharp errors when this pattern is used in a shader

* emulator: Add log

* video_core: Bump binary info search range and buffer num
2025-07-09 17:00:06 +03:00
Paris Oplopoios
4eaa992aff
Rename 'AddCary' to 'AddCarry' (#3206) 2025-07-07 13:29:11 +03:00
Paris Oplopoios
146e81a56a
Fix V_ADDC_U32 carry-out edge cases (#3200)
* Fix V_ADDC_U32 carry-out edge cases

* Use IAddCarry instead
2025-07-07 12:44:06 +03:00
TheTurtle
48460d1cbe
vector_alu: Improve handling of mbcnt append/consume patterns (#3184)
* vector_alu: Improve handling of mbcnt append/consume patterns

The existing implementation was written to handle a single pattern of mbcnt before the DS_APPEND instruction

v_mbcnt_hi_u32_b32 vX, exec_hi, 0
v_mbcnt_lo_u32_b32 vX, exec_lo, vX
ds_append       vY offset:4 gds
v_add_i32       vX, vcc, vY, vX

In this case however the DS_APPEND is before the mbcnt pattern

ds_append       vX gds
v_mbcnt_hi_u32_b32 vY, exec_hi, vX
v_mbcnt_lo_u32_b32 vZ, exec_lo, vY

The mbcnt instructions are always in pairs of hi/lo and in general are quite flexible. But they assume the subgroup size is 64 so they are not recompiled literally. Together with DS_APPEND they are used to derive a unique per thread index in a buffer (different from using thread_id as order could be random). DS_APPEND instruction works on per subgroup level, by adding number of active threads of subgroup to the GDS counter, essentially giving a multiple-of-64 base index to all threads. Then each thread executes the mbcnt pair which returns the number of active threads with id less than the itself and adds it with the base.

The recompiler translates DS_APPEND into an atomic increment of a storage buffer counter, which already gives the desired unique index, so this pattern is a no-op. On main it was set to zero as per the first pattern to avoid altering the DS_APPEND result. The new handling passes through the initial value of the pattern instead, which has the same effect but works on either case.

* vk_rasterizer: Always sync DMA buffers
2025-07-03 13:19:38 +03:00
Marcin Mikołajczyk
7431b30005
Support for BUFFER_ATOMIC_S/UMIN_X2 (#3182)
* Fix BufferAtomicS/UMax64 SPIR-V emitting

* Support for BUFFER_ATOMIC_S/UMIN_X2
2025-07-02 18:13:07 -07:00
nickci2002
9eae6b57ce
V_CMP_EQ_U64 support (#3153)
* Added V_CMP_EQ_U64 shader opcode support and added 64-bit relational operators (<,>,<=,>=)

* Fixed clang-format crying because I typed xargs clang-format instead of xargs clang-format-19

* Replaced V_CMP_EQ_U64 code to match V_CMP_U32 to test

* Updated V_CMP_U64 for future addons
2025-07-02 19:22:30 +03:00
Marcin Mikołajczyk
1757dfaf5a
buffer_atomic_imax_x2 (#3130)
* buffer_atomic_imax_x2

* Define Int64Atomics SPIR-V capability
2025-06-29 16:16:47 -07:00
TheTurtle
a49b13fe66
shader_recompiler: Optimize general case of buffer addressing (#3159)
* shader_recompiler: Simplify dma types

Only U32 is needed for S_LOAD_DWORD

* shader_recompiler: Perform address shift on IR level

Buffer instructions now expect address in the data unit they work on. Doing the shift on IR level will allow us to optimize some operations away on common case

* shader_recompiler: Optimize common buffer access pattern

* emit_spirv: Use 32-bit integer ops for fault buffer

Not many GPUs have 8-bit bitwise or operations so that would probably require some overhead to emulate from the driver

* resource_tracking_pass: Fix texel buffer shift
2025-06-26 12:14:36 +03:00
Marcin Mikołajczyk
423254692a
Implement buffer atomic fmin/fmax instructions (#3123) 2025-06-19 17:37:29 -07:00
Marcin Mikołajczyk
efa8f6a154
Handle immediate inline samplers (#3015)
* Handle immediate inline sampler

* Simplify inline sampler handling
2025-06-16 23:42:14 -07:00