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dahjah synced commits to refs/pull/17909/merge at dahjah/rpcs3 from mirror 2026-04-04 03:47:55 -06:00
aa841ac332 LLVM: Add source location for bitcast error
ceb2168375 SPU LLVM: Remove debug code
Compare 3 commits »
dahjah synced commits to refs/pull/16637/merge at dahjah/rpcs3 from mirror 2026-04-04 03:47:55 -06:00
aa841ac332 LLVM: Add source location for bitcast error
ceb2168375 SPU LLVM: Remove debug code
02eb549208 SPU LLVM: Fix register updates in second block of Reduced Loop
13de8233b0 SPU Analyzer: Fix register origin for Reduced Loop
Compare 8 commits »
dahjah synced commits to refs/pull/16582/merge at dahjah/rpcs3 from mirror 2026-04-04 03:47:54 -06:00
aa841ac332 LLVM: Add source location for bitcast error
ceb2168375 SPU LLVM: Remove debug code
02eb549208 SPU LLVM: Fix register updates in second block of Reduced Loop
13de8233b0 SPU Analyzer: Fix register origin for Reduced Loop
Compare 8 commits »
dahjah synced commits to refs/pull/16007/merge at dahjah/rpcs3 from mirror 2026-04-04 03:47:53 -06:00
aa841ac332 LLVM: Add source location for bitcast error
ceb2168375 SPU LLVM: Remove debug code
02eb549208 SPU LLVM: Fix register updates in second block of Reduced Loop
13de8233b0 SPU Analyzer: Fix register origin for Reduced Loop
Compare 8 commits »
dahjah synced commits to refs/pull/14252/merge at dahjah/rpcs3 from mirror 2026-04-04 03:47:53 -06:00
aa841ac332 LLVM: Add source location for bitcast error
ceb2168375 SPU LLVM: Remove debug code
02eb549208 SPU LLVM: Fix register updates in second block of Reduced Loop
13de8233b0 SPU Analyzer: Fix register origin for Reduced Loop
Compare 8 commits »
dahjah synced commits to refs/pull/7047/merge at dahjah/vaultwarden from mirror 2026-04-03 20:08:26 -06:00
17bb86dbbc Refactor logout function parameters
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dahjah synced commits to refs/pull/7047/head at dahjah/vaultwarden from mirror 2026-04-03 20:08:15 -06:00
17bb86dbbc Refactor logout function parameters
dahjah synced commits to refs/pull/18498/merge at dahjah/rpcs3 from mirror 2026-04-03 19:38:13 -06:00
2fa716445c Fixed crash at boot parsing an ISO with a empty directory entry at file head
aa841ac332 LLVM: Add source location for bitcast error
ceb2168375 SPU LLVM: Remove debug code
02eb549208 SPU LLVM: Fix register updates in second block of Reduced Loop
Compare 9 commits »
dahjah synced commits to refs/pull/18498/head at dahjah/rpcs3 from mirror 2026-04-03 19:38:13 -06:00
2fa716445c Fixed crash at boot parsing an ISO with a empty directory entry at file head
dahjah synced commits to refs/pull/18423/merge at dahjah/rpcs3 from mirror 2026-04-03 19:38:13 -06:00
02eb549208 SPU LLVM: Fix register updates in second block of Reduced Loop
13de8233b0 SPU Analyzer: Fix register origin for Reduced Loop
ff4444b18e Silence cellNetCtlGetInfo
555ace0955 rsx: Silence Unknown render mode error
Compare 6 commits »
dahjah synced commits to refs/pull/18422/merge at dahjah/rpcs3 from mirror 2026-04-03 19:38:13 -06:00
02eb549208 SPU LLVM: Fix register updates in second block of Reduced Loop
13de8233b0 SPU Analyzer: Fix register origin for Reduced Loop
ff4444b18e Silence cellNetCtlGetInfo
555ace0955 rsx: Silence Unknown render mode error
Compare 6 commits »
dahjah synced commits to refs/pull/18320/merge at dahjah/rpcs3 from mirror 2026-04-03 19:38:13 -06:00
02eb549208 SPU LLVM: Fix register updates in second block of Reduced Loop
13de8233b0 SPU Analyzer: Fix register origin for Reduced Loop
ff4444b18e Silence cellNetCtlGetInfo
555ace0955 rsx: Silence Unknown render mode error
Compare 6 commits »
dahjah synced commits to refs/pull/18245/merge at dahjah/rpcs3 from mirror 2026-04-03 19:38:13 -06:00
02eb549208 SPU LLVM: Fix register updates in second block of Reduced Loop
13de8233b0 SPU Analyzer: Fix register origin for Reduced Loop
ff4444b18e Silence cellNetCtlGetInfo
555ace0955 rsx: Silence Unknown render mode error
Compare 6 commits »
dahjah synced commits to refs/pull/18205/merge at dahjah/rpcs3 from mirror 2026-04-03 19:38:12 -06:00
02eb549208 SPU LLVM: Fix register updates in second block of Reduced Loop
13de8233b0 SPU Analyzer: Fix register origin for Reduced Loop
ff4444b18e Silence cellNetCtlGetInfo
555ace0955 rsx: Silence Unknown render mode error
Compare 6 commits »
dahjah synced commits to refs/pull/18199/merge at dahjah/rpcs3 from mirror 2026-04-03 19:38:12 -06:00
02eb549208 SPU LLVM: Fix register updates in second block of Reduced Loop
13de8233b0 SPU Analyzer: Fix register origin for Reduced Loop
ff4444b18e Silence cellNetCtlGetInfo
555ace0955 rsx: Silence Unknown render mode error
Compare 6 commits »
dahjah synced commits to refs/pull/18154/merge at dahjah/rpcs3 from mirror 2026-04-03 19:38:11 -06:00
02eb549208 SPU LLVM: Fix register updates in second block of Reduced Loop
13de8233b0 SPU Analyzer: Fix register origin for Reduced Loop
ff4444b18e Silence cellNetCtlGetInfo
555ace0955 rsx: Silence Unknown render mode error
Compare 6 commits »
dahjah synced commits to refs/pull/18127/merge at dahjah/rpcs3 from mirror 2026-04-03 19:38:11 -06:00
02eb549208 SPU LLVM: Fix register updates in second block of Reduced Loop
13de8233b0 SPU Analyzer: Fix register origin for Reduced Loop
ff4444b18e Silence cellNetCtlGetInfo
555ace0955 rsx: Silence Unknown render mode error
Compare 6 commits »
dahjah synced commits to refs/pull/18056/merge at dahjah/rpcs3 from mirror 2026-04-03 19:38:10 -06:00
02eb549208 SPU LLVM: Fix register updates in second block of Reduced Loop
13de8233b0 SPU Analyzer: Fix register origin for Reduced Loop
ff4444b18e Silence cellNetCtlGetInfo
555ace0955 rsx: Silence Unknown render mode error
Compare 6 commits »
dahjah synced commits to refs/pull/17942/merge at dahjah/rpcs3 from mirror 2026-04-03 19:38:10 -06:00
02eb549208 SPU LLVM: Fix register updates in second block of Reduced Loop
13de8233b0 SPU Analyzer: Fix register origin for Reduced Loop
ff4444b18e Silence cellNetCtlGetInfo
555ace0955 rsx: Silence Unknown render mode error
Compare 7 commits »
dahjah synced commits to refs/pull/17909/merge at dahjah/rpcs3 from mirror 2026-04-03 19:38:10 -06:00
02eb549208 SPU LLVM: Fix register updates in second block of Reduced Loop
13de8233b0 SPU Analyzer: Fix register origin for Reduced Loop
ff4444b18e Silence cellNetCtlGetInfo
555ace0955 rsx: Silence Unknown render mode error
Compare 6 commits »