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rsx/cfg: Fix grouping barrier16 instructions when lane is shared.
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@ -161,10 +161,11 @@ namespace rsx::assembler::FP
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const u32 src_reg_id = reg.reg.id / 2;
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const bool is_odd_reg = !!(reg.reg.id & 1);
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const bool is_odd_ch = !!(ch & 1);
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const bool is_word0 = ch < 2;
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// If we're a non-odd register, we should also write the next channel (y/w)
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if (!is_odd_reg && (mask & 2))
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// If we're an even channel, we should also write the next channel (y/w)
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if (!is_odd_ch && (mask & 2))
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{
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mask >>= 1;
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++ch;
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